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A method for testing the operating usefulness of bit lines in a dram memory device
A method for testing the operating usefulness of bit lines in a dram memory device
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机译:一种测试dram存储设备中位线的操作有用性的方法
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摘要
A method for testing the operating usefulness of bit lines (bl), read amplifiers and precharging circuits (15) in a dram memory device (1) with the following process steps:(a) adjusting a dram memory device (1) in a test mode;(b) applying a write operation to the dram memory device (1) for writing a predetermined test data value in a memory cell (12), which contains a bit line (bl) is connected, and simultaneously switching on a active power generator (7, 8, 9, 10) for supplying power to a sense amplifier and a precharge circuit (15), which is connected with the bit line (bl);(c) off of the active power generator (7, 8, 9, 10) and switching of a standby power generator (6) on the sense amplifier and the precharge circuit (15) of the bit line (bl) in a controllable switching time (t4), the switching time (t4) in relation to a switching time, during a normal operating mode, premature or is earlier;(d) performing a subpoena process on the bit line (bl) by the closing of a with the memory cell (12) is connected to the word line (wl) and applying a precharge voltage to the bit line precharge circuit (15, by the associated);(e) reading out of the in the memory cell (12) of stored data value.(f) comparing the read data value with the previously determined test data.
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