Method for assessing signal value i.e. engine speed, of field programmable gate array at run-time of processing device, involves reading status data from memory as read-back data, and determining signal value by mapping data on value

摘要

The method involves loading a field programmable gate array (FPGA) hardware configuration to a FPGA (5), and running the FPGA hardware configuration on the FPGA. Signal value of the FPGA is requested, and status data from a functional layer of the FPGA is transmitted to a configuration memory in a configuration level. The status data from the configuration memory is read as read-back data, and signal value of the read-back data is determined by mapping the read-back data on register value. Independent claims are also included for the following: (1) a method for carrying out of FPGA process based on a FPGA model in a hardware description language (2) a data processing device with a processor unit and a FPGA (3) a computer program product having instructions o perform a method for accessing signal value of a FPGA (4) a digital storage medium having instructions to perform a method for accessing signal value of a FPGA.