METHOD FOR IMPLEMENTING ADAPTIVE INTERFACE, AND FPGA CONTROL SYSTEM

摘要

PROBLEM TO BE SOLVED: To provide an FPGA control system that enables variable data transmission between sender and receiver sides with a desired data rate and latency with the provision of a high data rate and a low latency, and implements it at a low cost.;SOLUTION: A maximum number of registers 9 to be transmitted are configured for each FPGA application 8. A shared, fixed register width is configured for all the registers 9. An enable signal EN is set on a sender side 3 for registers 9 to be transmitted out of the maximum number of registers 9 to be transmitted, the enable signal EN is transmitted from the sender side 3 to a receiver side 4, and the registers 9 for which the enable signal EN has been set are transmitted from the sender side 3 to the receiver side 4.;COPYRIGHT: (C)2015,JPO&INPIT