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A method for rapid evaluation of lithographic bond patterns in integrated circuit layouts.
A method for rapid evaluation of lithographic bond patterns in integrated circuit layouts.
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机译:一种用于快速评估集成电路布图中光刻键合图案的方法。
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摘要
The present invention provides a lithographic difficulty metric that is a function of an energy ratio factor that includes a ratio of hard-to-print energy to easy-to-print energy of the diffraction orders along an angular coordinate i of spatial frequency space, an energy entropy factor comprising energy entropy of said diffraction orders along said angular coordinate i, a phase entropy factor comprising phase entropy of said diffraction orders along said angular coordinate i, and a total energy entropy factor comprising total energy entropy of said diffraction orders. The hard-to-print energy includes energy of the diffraction orders at values of the normalized radial coordinates r of spatial frequency space in a neighborhood of r=0 and in a neighborhood of r=1, and the easy-to-print energy includes energy of the diffraction orders located at intermediate values of normalized radial coordinates r between the neighborhood of r=0 and the neighborhood of r=1. The value of the lithographic difficulty metric may be used to identify patterns in a design layout that are binding patterns in an optimization computation. The lithographic difficulty metric may be used to design integrated circuits that have good, relatively easy-to-print characteristics.
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