首页> 外国专利> Quality evaluation method of dielectric breakdown lifetime simulation method and the surface of the silicon wafer

Quality evaluation method of dielectric breakdown lifetime simulation method and the surface of the silicon wafer

机译:介电击穿寿命模拟方法和硅晶片表面的质量评估方法

摘要

PROBLEM TO BE SOLVED: To provide a breakdown life simulation method and a quality evaluation method for a silicon wafer surface, that can correctly analyze a defect kind, a defect size, and the like based on comparison with actual measurement data by obtaining a correct breakdown life of an insulation film through accurate simulation that is suitable for the breakdown life of an actual device.;SOLUTION: In a breakdown life simulation method, a defect is incorporated in advance at an interface between a silicon wafer and an insulation film and at an interface between the insulation film and a metal electrode, and/or in the insulation film in a structure that is to be subjected to simulation. In the structure including the defect, the breakdown life of the insulation film is obtained by generating a random number of defects in the insulation film.;COPYRIGHT: (C)2012,JPO&INPIT
机译:解决的问题:提供一种用于硅晶片表面的击穿寿命模拟方法和质量评估方法,其可以通过与正确的测量数据进行比较,从而获得正确的击穿,从而正确地分析缺陷种类,缺陷尺寸等。通过精确的模拟来模拟绝缘膜的寿命,该模拟适合于实际器件的击穿寿命。解决方案:在击穿寿命模拟方法中,预先在硅晶片和绝缘膜之间的界面处以及焊点处引入了缺陷。绝缘膜和金属电极之间的界面和/或绝缘膜中的绝缘膜处于要进行模拟的结构中。在具有缺陷的结构中,通过在绝缘膜中产生随机数量的缺陷来获得绝缘膜的击穿寿命。; COPYRIGHT:(C)2012,JPO&INPIT

著录项

  • 公开/公告号JP5636886B2

    专利类型

  • 公开/公告日2014-12-10

    原文格式PDF

  • 申请/专利权人 信越半導体株式会社;

    申请/专利号JP20100249919

  • 发明设计人 大槻 剛;

    申请日2010-11-08

  • 分类号H01L29/00;H01L21/66;H01L21/336;H01L29/78;H01L21/822;H01L27/04;H01L21/316;

  • 国家 JP

  • 入库时间 2022-08-21 15:27:40

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号