首页> 外国专利> Methods, systems, and articles of manufacture for tessellating and labeling routing space for routing electronic designs

Methods, systems, and articles of manufacture for tessellating and labeling routing space for routing electronic designs

机译:方法,系统和制造品,用于细分和标记用于布线电子设计的布线空间

摘要

Various aspects described herein create tessellated regions by identifying tessellation lines in one or more directions based at least on fixed shape(s) or route(s). New cells or shapes are added to the design by aligning at least some of the boundary segments of the new cells or shapes with existing tessellation lines. Tessellation lines are dynamically adjustable. At least some tessellated regions are associated with initial or tentative track pattern labels some of which are iteratively updated during implementation of the design. Multiple candidate track patterns may be ranked based on consistency costs to determine a tentative track pattern. Designs may be implemented with a trackless approach in trackless region(s) followed by a tracked approach based at least in part upon the initial or tentative labels that are dynamically adjusted during implementation. Capacities and demands are assessed at boundary segments of cells by using the tracked or trackless approach.
机译:本文所述的各个方面通过至少基于固定的形状或路线来识别一个或多个方向上的镶嵌线来创建镶嵌区域。通过将新单元格或形状的至少一些边界线段与现有的细分线对齐,将新的单元格或形状添加到设计中。镶嵌线可动态调整。至少一些棋盘格化区域与初始或临时轨道图案标签相关联,其中一些在设计的实现过程中被迭代更新。可以基于一致性成本对多个候选轨道模式进行排序,以确定临时轨道模式。可以在无轨区域中用无轨方法来实施设计,然后至少部分地基于在实施过程中动态调整的初始标签或临时标签来执行跟踪方法。通过使用跟踪或无跟踪方法,可以在单元的边界部分评估容量和需求。

著录项

  • 公开/公告号US9165103B1

    专利类型

  • 公开/公告日2015-10-20

    原文格式PDF

  • 申请/专利权人 CADENCE DESIGN SYSTEMS INC.;

    申请/专利号US201414318507

  • 发明设计人 JEFFREY S. SALOWE;

    申请日2014-06-27

  • 分类号G06F17/50;

  • 国家 US

  • 入库时间 2022-08-21 15:22:26

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号