首页> 外国专利> Input space reduction for verification test set generation

Input space reduction for verification test set generation

机译:减少输入空间以生成验证测试集

摘要

Various embodiments provide for the determination of a test set that satisfies a coverage model, where portions of the search space need not be searched in order to generate the test set. With various embodiments, a search space defined by a set of inputs for an electronic design and a coverage model is identified. The search space is then fractured into subspaces. Subsequently, the subspaces are solved to determine if they include at least one input sequence that satisfies the coverage constraints defined in the coverage model. The subspaces found to include at least one input sequence that satisfies these coverage constraints, are then searched for unique input sequences in order to generate a test set. Subspaces found not to include at least one input sequence that satisfies the coverage constraints may be excluded from the overall search space.
机译:各种实施例提供满足覆盖模型的测试集的确定,其中不需要搜索部分搜索空间以生成测试集。在各种实施例中,标识了由用于电子设计和覆盖模型的一组输入所定义的搜索空间。然后将搜索空间分解为子空间。随后,求解子空间以确定它们是否包括至少一个满足覆盖模型中定义的覆盖约束的输入序列。然后,搜索被发现包括至少一个满足这些覆盖范围约束的输入序列的子空间,以寻找唯一的输入序列,以生成测试集。发现不包括至少一个满足覆盖范围约束的输入序列的子空间可以从整个搜索空间中排除。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号