首页> 外国专利> HEURISTICS FOR IMPROVING PERFORMANCE IN A TILE-BASED ARCHITECTURE

HEURISTICS FOR IMPROVING PERFORMANCE IN A TILE-BASED ARCHITECTURE

机译:在平铺式建筑中改善性能的启发式方法

摘要

One embodiment of the present invention includes a technique for processing graphics primitives in a tile-based architecture. The technique includes storing, in a buffer, a first plurality of graphics primitives and a first plurality of state bundles received from a world-space pipeline, and transmitting the first plurality of graphics primitives to a screen-space pipeline for processing while a tiling function is enabled. The technique further includes storing, in the buffer, a second plurality of graphics primitives and a second plurality of state bundles received from the world-space pipeline. The technique further includes determining, based on a first condition, that the tiling function should be disabled and that the second plurality of graphics primitives should be flushed from the buffer, and transmitting the second plurality of graphics primitives to the screen-space pipeline for processing while the tiling function is disabled.
机译:本发明的一个实施例包括一种用于在基于图块的架构中处理图形图元的技术。该技术包括在缓冲器中存储从世界空间管线接收的第一多个图形基元和第一多个状态束,以及将第一多个图形基元传输到屏幕空间管线以在平铺功能时进行处理。已启用。该技术还包括将从缓冲器中接收的第二多个图形基元和第二多个状态束存储在缓冲器中。该技术还包括:基于第一条件,确定应禁用切片功能,并且应从缓冲器中清除第二多个图形基元,以及将第二多个图形基元传输到屏幕空间管线以进行处理。而禁用平铺功能。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号