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High-capacity module including the peripheral circuit using the circuit board and the circuit board concerned for peripheral circuits of a high-capacity module

机译:大容量模块,其包括使用所述电路板的外围电路和用于所述大容量模块的外围电路的电路板

摘要

Problems, such as increase in the electrical resistance in the junction(s) of the terminal(s) of a power semiconductor element and the electrode(s) of a peripheral circuit and decrease in the dielectric strength voltage between adjacent junctions, resulting from the insufficient alignment of the power semiconductor element terminal(s) and the the peripheral circuit electrode(s), in the high-capacity module which is intended to attain reduction in size and weight, reduction in surge, and reduction in loss by lamination of the peripheral circuit onto the power circuit, should be reduced. By preparing level difference(s) in the surface of the peripheral circuit board to more accurately align the peripheral circuit board electrode(s) and the power semiconductor element terminal(s) by contact of the level difference(s) and the lateral face(s) of the power semiconductor element at the time of lamination of the power circuit and the peripheral circuit, the above-mentioned problems can be reduced.
机译:诸如功率半导体元件的一个或多个端子与外围电路的一个或多个电极之间的结中的电阻增加以及相邻结之间的介电强度电压降低等问题。在大容量模块中,功率半导体元件端子与外围电路电极的对准不充分,旨在实现尺寸和重量的减小,浪涌的减小以及由于层叠而造成的损耗的减小外围电路改成电源电路,应减少。通过在外围电路板的表面中准备高低差,以通过高低差和侧面的接触来更精确地对准高低电路板电极和功率半导体元件端子。在功率电路和外围电路层叠时的功率半导体元件的s)中,可以减少上述问题。

著录项

  • 公开/公告号US9064758B2

    专利类型

  • 公开/公告日2015-06-23

    原文格式PDF

  • 申请/专利权人 NGK INSULATORS LTD.;

    申请/专利号US201213630866

  • 申请日2012-09-28

  • 分类号H05K1/11;H05K1/14;H01L23/13;H01L25/07;H01L25/18;H01L23/057;H01L23/24;H01L23/36;H01L23/498;H01L23;

  • 国家 US

  • 入库时间 2022-08-21 15:19:47

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