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Considering compatibility of adjacent boundary regions for standard cells placement and routing

机译:考虑相邻边界区域对标准单元格放置和布线的兼容性

摘要

A method of generating an integrated circuit layout comprises a step of determining a placement of standard cells selected from a standard cell library while permitting boundary conflicts in which incompatible boundary regions of standard cells are placed next to each other. After determining routing connections between the standard cells, the integrated circuit layout is generated. The generation of the integrated circuit layout includes a mapping step of mapping at least one incompatible boundary region to an alternative boundary region to resolve at least one boundary conflict.
机译:一种产生集成电路布图的方法包括确定从标准单元库中选择的标准单元的位置,同时允许边界冲突的步骤,在该冲突中,标准单元的不兼容边界区域彼此相邻放置。确定标准单元之间的路由连接后,将生成集成电路布局。集成电路布局的产生包括将至少一个不相容边界区域映射到替代边界区域以解决至少一个边界冲突的映射步骤。

著录项

  • 公开/公告号US8959472B1

    专利类型

  • 公开/公告日2015-02-17

    原文格式PDF

  • 申请/专利权人 ARM LIMITED;

    申请/专利号US201314039224

  • 申请日2013-09-27

  • 分类号G06F17/50;

  • 国家 US

  • 入库时间 2022-08-21 15:19:34

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