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Multi-core shared memory system with memory port to memory space mapping

机译:具有内存端口到内存空间映射的多核共享内存系统

摘要

A multi-core processor system includes a memory controller that includes multiple ports and shared memory that includes physical address spaces divided among the ports. A CPU acquires from a parallel degree information table, the number of CPUs to which software that is to be executed by the multi-core processor system, is to be assigned. After this acquisition, the CPU determines the CPUs to which the software to be executed is to be assigned and sets for each CPU, physical address spaces corresponding to logical address spaces defined by the software to be executed. After this setting, the CPU notifies an address converter of the addresses and notifies the software to be executed of the start of execution.
机译:多核处理器系统包括:存储器控制器,其包括多个端口;以及共享存储器,其包括在端口之间划分的物理地址空间。 CPU从并行度信息表中获取要分配给多核处理器系统执行的软件的CPU的数量。在该获取之后,CPU确定要向其分配要执行的软件的CPU,并为每个CPU设置与由要执行的软件定义的逻辑地址空间相对应的物理地址空间。进行此设置后,CPU将地址通知地址转换器,并将执行开始通知要执行的软件。

著录项

  • 公开/公告号US8990516B2

    专利类型

  • 公开/公告日2015-03-24

    原文格式PDF

  • 申请/专利权人 FUJITSU LIMITED;

    申请/专利号US201213623399

  • 发明设计人 KOICHIRO YAMASHITA;FUMIHIKO HAYAKAWA;

    申请日2012-09-20

  • 分类号G06F12/00;G06F9/50;

  • 国家 US

  • 入库时间 2022-08-21 15:18:32

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