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Prefetching load data in lookahead mode and invalidating architectural registers instead of writing results for retiring instructions
Prefetching load data in lookahead mode and invalidating architectural registers instead of writing results for retiring instructions
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机译:以超前模式预取加载数据并使体系结构寄存器无效,而不是为退出指令编写结果
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摘要
The disclosed embodiments relate to a system that executes program instructions on a processor. During a normal-execution mode, the system issues instructions for execution in program order. Upon encountering an unresolved data dependency during execution of an instruction, the system speculatively executes subsequent instructions in a lookahead mode to prefetch future loads. When an instruction retires during the lookahead mode, a working register which serves as a destination register for the instruction is not copied to a corresponding architectural register. Instead the architectural register is marked as invalid. Note that by not updating architectural registers during lookahead mode, the system eliminates the need to checkpoint the architectural registers prior to entering lookahead mode.
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