首页> 外国专利> Minimizing the use of chip routing resources when using timestamped instrumentation data by transmitting the most significant bits of the timestamp in series and transmitting the least significant bits of the timestamp in parallel

Minimizing the use of chip routing resources when using timestamped instrumentation data by transmitting the most significant bits of the timestamp in series and transmitting the least significant bits of the timestamp in parallel

机译:通过串联传输时间戳的最高有效位并并行传输时间戳的最低有效位,在使用带有时间戳的仪器数据时,最大程度地减少芯片路由资源的使用

摘要

A timestamp generator generates a timestamp value having a predetermined number of most significant bits and a predetermined number of least significant bits. The least significant bits are transmitted to a client via a parallel data bus. The most significant bits are transmitted to the client sequentially via a series data bus. Each client receives the parallel least significant bits and the series most significant bits and assembles a complete time stamp value.
机译:时间戳生成器生成具有预定数量的最高有效位和预定数量的最低有效位的时间戳值。最低有效位通过并行数据总线传输到客户端。最高有效位通过串行数据总线顺序传输到客户端。每个客户端接收并行的最低有效位和系列的最高有效位,并组装一个完整的时间戳值。

著录项

  • 公开/公告号US8924767B2

    专利类型

  • 公开/公告日2014-12-30

    原文格式PDF

  • 申请/专利权人 GARY L. SWOBODA;

    申请/专利号US20100971930

  • 发明设计人 GARY L. SWOBODA;

    申请日2010-12-17

  • 分类号G06F1/04;G06F13/38;G06F1/14;

  • 国家 US

  • 入库时间 2022-08-21 15:16:57

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