The present invention relates to a computer-implemented method for an automatic synthesis of distributed embedded systems, wherein the tasks to be processed by the system are mapped to a hardware structure having a plurality of processing units such that predefined time limits of the tasks are met, comprising the steps of (a) assigning the tasks to the plurality of processing steps, with the following substeps: (aa) assigning a task to a processing unit; (bb) determining the outgoing event densities; (cc) comparing the output density towards the next task with a predefined threshold and assigning the next task to the same processing unit if the event density is below the threshold or assigning the next task to any other processing unit if the event density is smaller than the threshold; (dd) repeating steps (aa) to (cc) until all tasks are assigned to the processing units; (b) checking whether the costs of the given task assignment to the processing units satisfy a predefined solution criterion; (c) repeating steps (a) to (b) with a new task assignment to the processing units until the task assignment fulfills the predefined solution criteria; (d) assigning the tasks to the processes of the operational systems of the processing units assigned to the tasks; (e) checking whether the given task assignment to the processes of the operational systems of the processing units satisfies the predefined time criteria of the tasks; (f) calculating the costs associated with the given task assignment to the processes of the operational systems of the processing units if the predefined time criteria of the tasks are satisfied; (g) repeating steps (a) to (c) with a new task assignment to the processing units or repeating steps (d) to (f) with a new task assignment to the processes of the operational systems of the assigned processing units until the costs of the current solution satisfy a predefined solution criterion.
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