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An area-efficient process-and-temperature-adaptive self-time scheme for performance and power improvement
An area-efficient process-and-temperature-adaptive self-time scheme for performance and power improvement
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机译:一种面积有效的过程和温度自适应自计时方案,可提高性能和功耗
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摘要
pIn certain embodiments, a method and apparatus for adjusting the timing of a sense-amplifier read operation in an SRAM integrated memory circuit to overcome process-and-temperature variations are disclosed. A charge-injection pull-up transistor is provided to adjust the rate at which a signal line (e.g., a tracking bit line (TBL) and/or a clock signal (e.g., GCLKB)) transitions from one voltage level to another voltage level. A process-and-temperature-dependent bias circuit is provided to control the charge-injection pull-up transistor. The bias circuit causes the charge-injection pull-up transistor to adjust the discharge rate or transition rate of the signal line to compensate for timing delays caused by process or temperature variations./p
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