ARCHITECTURE FOR POWER CONSUMPTION REDUCTION IN GNSS RECEIVERS

摘要

A global navigation satellite system (GNSS) receiver is provided. The GNSS receiver includes a front end processor (FEP) including a low power signaling path and a high power signaling path; an individual GNSS satellite processing (IGSP) module including a low power signaling path and a high power signaling path; and a module programmed to detect a carrier-to-noise density (C/N_o) of a signal received at the GNSS receiver and select at least one of the low power signaling path and the high power signaling path of the FEP and IGSP module based on the detected C/N_o.