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Communicating prefetchers that throttle one another

机译:沟通相互制约的预取器

摘要

A microprocessor includes a first hardware data prefetcher that prefetches data into the microprocessor according to a first algorithm. The microprocessor also includes a second hardware data prefetcher that prefetches data into the microprocessor according to a second algorithm, wherein the first and second algorithms are different. The second prefetcher detects that it is prefetching data into the microprocessor according to the second algorithm in excess of a first predetermined rate and, in response, sends a throttle indication to the first prefetcher. The first prefetcher prefetches data into the microprocessor according to the first algorithm at below a second predetermined rate in response to receiving the throttle indication from the second prefetcher.
机译:微处理器包括第一硬件数据预取器,其根据第一算法将数据预取到微处理器中。微处理器还包括第二硬件数据预取器,其根据第二算法将数据预取到微处理器中,其中第一算法和第二算法是不同的。第二预取器检测到它正在根据第二算法以超过第一预定速率将数据预取到微处理器中,并且作为响应,将节流指示发送给第一预取器。响应于从第二预取器接收到节流指示,第一预取器根据第一算法以低于第二预定速率将数据预取到微处理器中。

著录项

  • 公开/公告号US9483406B2

    专利类型

  • 公开/公告日2016-11-01

    原文格式PDF

  • 申请/专利权人 VIA TECHNOLOGIES INC.;

    申请/专利号US201414315064

  • 发明设计人 JOHN MICHAEL GREER;RODNEY E. HOOKER;

    申请日2014-06-25

  • 分类号G06F12/00;G06F12/08;

  • 国家 US

  • 入库时间 2022-08-21 14:32:02

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