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Utilization-based throttling of hardware prefetchers

机译:基于利用率的硬件预取器限制

摘要

An system for prefetching data for a processor includes a processor core, a memory, a cache memory, and a prefetch circuit. The memory may be configured to store information for use by the processor core. The cache memory may be configured to issue a fetch request for information from the memory for use by the processor core. The prefetch circuit may be configured to issue a prefetch request for information from the memory to store in the cache memory using a predicted address, and to monitor, over a particular time interval, an amount of fetch requests from the cache memory and prefetch requests from the prefetch circuit. The prefetch circuit may also be configured to disable prefetch requests from the memory for a subsequent time interval in response to a determination that the amount satisfies a threshold amount.
机译:一种用于为处理器预取数据的系统,包括处理器核,存储器,高速缓冲存储器和预取电路。存储器可以被配置为存储供处理器核使用的信息。高速缓存存储器可以被配置为从存储器发出对信息的获取请求,以供处理器核使用。预取电路可以被配置为发出来自存储器的信息的预取请求,以使用预测的地址存储在高速缓存中,并在特定的时间间隔内监视来自高速缓存的取回请求的数量以及来自高速缓存的预取请求的数量。预取电路。预取电路还可以被配置为响应于确定量满足阈值量而在随后的时间间隔内禁用来自存储器的预取请求。

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