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Layout configurations for integrating schottky contacts into a power transistor device

机译:用于将肖特基触点集成到功率晶体管器件的布局配置

摘要

A semiconductor device includes a vertical field-effect-transistor (FET) and a bypass diode. The vertical FET device includes a substrate, a drift layer formed over the substrate, a gate contact and a plurality of source contacts located on a first surface of the drift layer opposite the substrate, a drain contact located on a surface of the substrate opposite the drift layer, and a plurality of junction implants, each of the plurality of junction implants laterally separated from one another on the surface of the drift layer opposite the substrate and extending downward toward the substrate. Each of the one or more bypass diodes are formed by placing a Schottky metal contact on the first surface of the drift layer, such that each Schottky metal contact runs between two of the plurality of junction implants.
机译:半导体器件包括垂直场效应晶体管(FET)和旁路二极管。垂直FET器件包括衬底,形成在衬底上方的漂移层,栅极触点和位于漂移层的与衬底相对的第一表面上的多个源极触点,位于衬底的与衬底相对的表面上的漏极触点。漂移层和多个结注入,多个结注入中的每一个在漂移层的与衬底相对的表面上彼此横向分离并朝着衬底向下延伸。通过在漂移层的第一表面上放置肖特基金属接触件来形成一个或多个旁路二极管中的每一个,使得每个肖特基金属接触件在多个结注入中的两个之间延伸。

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