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Cells having transistors and interconnects including nanowires or 2D material strips

机译:具有晶体管和包括纳米线或2D材料带的互连的单元

摘要

An integrated circuit design tool includes a cell library. The cell library includes entries for a plurality of cells, entries in the cell library including specifications of particular cells in a computer executable language. At least one entry in the cell library can comprise a specification of physical structures and timing parameters of a plurality of transistors and an interconnect; wherein a transistor in the plurality has a channel comprising one or more nanowires or 2D material strips arranged in parallel, and the interconnect comprises one or more nanowires or 2D material strips arranged in parallel and connected to terminals of more than one of the transistors in the plurality of transistors. An integrated circuit including the plurality of transistors and the interconnect is described.
机译:集成电路设计工具包括单元库。单元库包括用于多个单元的条目,单元库中的条目包括计算机可执行语言中的特定单元的规范。单元库中的至少一个条目可以包括多个晶体管和互连的物理结构和时序参数的规范;其中,多个晶体管中的一个沟道包括一个或多个平行布置的纳米线或2D材料带,而互连包括一个或多个纳米线或平行布置的2D材料带,并连接到该晶体管中一个以上晶体管的端子。多个晶体管。描述了包括多个晶体管和互连的集成电路。

著录项

  • 公开/公告号US9400862B2

    专利类型

  • 公开/公告日2016-07-26

    原文格式PDF

  • 申请/专利权人 SYNOPSYS INC.;

    申请/专利号US201414312352

  • 发明设计人 JAMIL KAWA;VICTOR MOROZ;

    申请日2014-06-23

  • 分类号G06F17/50;H01L27/02;

  • 国家 US

  • 入库时间 2022-08-21 14:30:44

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