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Maximum-likelihood decoder in a memory controller for synchronization
Maximum-likelihood decoder in a memory controller for synchronization
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机译:存储控制器中用于同步的最大似然解码器
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摘要
Described herein are apparatus, system, and method for data synchronization via a maximum-likelihood decoder in a memory controller. The method comprises receiving a constrained codeword from a non-volatile memory (NVM) via a channel, the constrained codeword including an appended bit-stream; and decoding the received constrained codeword by reconstructing the appended bit-stream and invoking a synchronization procedure that applies a maximum-likelihood (ML) estimator to estimate locations of any insertion, deletion, or error in the reconstructed appended bit-stream.
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