OPTIMIZATION OF PCB LAYER STACK FOR AIRBORNE APPLICATIONS

摘要

Challenges like, high speed data rate of processors1 and memory modules, high frequency, low noise, high power of transceivers, high current with low voltages, high current and high voltages are the major challenges while designing airborne Printed Circuit Boards. Optimizing the number of layers effectively, helps to reduce the weight and controlling other requirements viz., thermal mana gement; signal integrity and power management, EMI/EMC limitation and manufacturing cost.