PCB/FPGA Codesign Opens System Future Cadence Optimizes FPGA Interconnect to Reduce PCB Layers

摘要

It's almost a law of nature. Like gravity. The semiconductor vendor designs chips, manufactures them and packages them. The OEM system architect decides which chips are best for the new system and how they should talk to each other. And, the printed circuit board (PCB)rndesigner is left with the non-trivial task of connecting the chips to each other while keeping in mind various constraints such as clock skew, power consumption, temperature and the minimum number of metal layers-to name but a few.