METHODS AND SYSTEMS FOR REDUCING THE AMOUNT OF TIME AND COMPUTING RESOURCES THAT ARE REQUIRED TO PERFORM A HARDWARE TABLE WALK

摘要

translation lookaside buffer (TLB) miss occurs if the hardware table walk (HWTW) Computer system and method for reducing the amount of time and computing resources required to perform is provided. When Stage 1 (SI) page table of the stage 2 (S2) HWTW causes a TLB miss when to perform in order to find the physical address (PA) is stored, MMU corresponding with the intermediate physical address (IPA) PA prediction, whereby, S2 of the look-up table thereby avoiding the need to perform any lookup. This reduces significantly the number of look-up which needs to be performed in the case of carrying out HWTW read transaction of these types and which significantly reduces the processing overhead and performance penalties associated with performing transactions of these types.