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trench gate power metal oxide semiconductorMOS device and fabrication method thereof

机译:沟槽栅功率金属氧化物半导体MOS器件及其制造方法

摘要

A trench gate type power MOS device according to the present invention includes an epitaxial layer formed on a substrate constituting a drain region, a well region formed in the epitaxial layer, and a plurality of gate trenches spaced apart from each other and lower than the surface of the well region Source regions formed at upper portions of both sidewalls of the trench gate patterns and lower than the surface of the well region; source regions formed at lower than the surface of the well region and trench gate regions formed below the surface of the well region; A plurality of cell contact regions disposed in the well region between the source regions formed lower than the surface of the well region and self-aligned on both side walls of the head insulating layer; And a wiring layer electrically connected to the cell contact regions.
机译:根据本发明的沟槽栅型功率MOS器件包括:形成在构成漏极区域的基板上的外延层,形成在该外延层中的阱区域,以及彼此间隔开并且低于表面的多个栅极沟槽。阱区的源极区形成在沟槽栅图案的两个侧壁的上部并且低于阱区的表面;在阱区的表面下方形成的源极区和在阱区的表面下方形成的沟槽栅区;在源极区域之间的阱区域中设置的多个单元接触区域形成为低于阱区域的表面并且在头绝缘层的两个侧壁上自对准。并且布线层电连接到单元接触区域。

著录项

  • 公开/公告号KR101572196B1

    专利类型

  • 公开/公告日2015-11-26

    原文格式PDF

  • 申请/专利权人 주식회사 화진;

    申请/专利号KR20140024596

  • 发明设计人 강진영;김창홍;김영;

    申请日2014-02-28

  • 分类号H01L29/78;H01L21/336;

  • 国家 KR

  • 入库时间 2022-08-21 14:15:33

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