SEQUENTIAL CIRCUIT DESIGN METHOD AND CLOCK GATING CIRCUIT

摘要

The present invention relates to a method for designing a semi-conductor circuit and, particularly, to a method for designing a sequential circuit for implementing low power and a clock gating circuit used therein. The method includes the steps of: creating a toggle matrix in which the numbers of times of toggles according to application of clocks to flip-flops constituting a sequential circuit to be designed are counted; creating a dynamic event matrix in which a correlation between flip-flops is calculated with reference to data of the toggle matrix; sequentially creating a virtual cluster group in a scheme of preferentially selecting a flip-flop having the minimum number of times of toggles among a set of the flip-flops, adding the selected flip-flop to a virtual cluster group, searching the dynamic event matrix for a flip-flop having a large correlation with the added flip-flop, and re-adding the discovered flip-flop to the virtual cluster group; and clustering all the flip-flops constituting the sequential circuit into a plurality of groups in a scheme of calculating a reduced value of electric power by connecting, to the clock gating circuit, one or more flip-flops added in the virtual cluster group creation step, and resorting flip-flops belonging to the virtual cluster group into true cluster groups according to the calculated reduced value of electric power.