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LDPC DESIGN FOR LIFTED LDPC CODES HAVING HIGH PARALLELISM LOW ERROR FLOOR AND SIMPLE ENCODING PRINCIPLE
LDPC DESIGN FOR LIFTED LDPC CODES HAVING HIGH PARALLELISM LOW ERROR FLOOR AND SIMPLE ENCODING PRINCIPLE
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机译:具有高并行度,低错误底限和简单编码原理的提升LDPC编码的LDPC设计
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摘要
A data encoding method is disclosed. The encoder receives the set of information bits and performs an LDPC encoding operation on the set of information bits to generate a codeword based on the matched lifted LDPC code. The matched lifted LDPC codes are based on a cyclic lifting group and include a number of parity bits and a submatrix to determine the values of the parity bits. The order (Z) of the lifting group corresponds to the magnitude of the lifting. The determinant of the submatrix is: Lt; / RTI Is the identity element of the group, , P is an arbitrary non-zero element of the binary grouping associated with the lifting group. The matched lifted LDPC codes may be based on quasi-cyclic lifting, where the determinant of the submatrix is: , P (x) has at least two terms, and Z is a 2 k L = 0 module for the positive integer (k).
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机译:公开了一种数据编码方法。编码器接收该组信息比特,并且对该组信息比特执行LDPC编码操作,以基于匹配的提升后的LDPC码生成码字。匹配的提升的LDPC码基于循环提升组,并且包括多个奇偶校验位和确定该奇偶校验位的值的子矩阵。提升组的顺序(Z)对应于提升的大小。子矩阵的行列式为:Lt; / RTI>是组的标识元素,P是与提升组关联的二进制分组的任意非零元素。匹配的提升的LDPC码可以基于准循环提升,其中子矩阵的行列式为:,P(x)具有至少两个项,并且Z是2 k Sup> L = 0模对于正整数(k)。
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