A system for schedule and executing best-effort, real-time and high-performance computing (HPC) processes

摘要

A system for scheduling and executing best-effort, real-time and high-performance computing (HPC) processes (106, 107), comprising: - a processor with one or more cores (102, 103); - a noise core handling device generated interrupts; - a per-core scheduler (141, 151) for best-effort and real-time processes, all per-core schedulers (141, 151) being able to deactivate their clock (121, 131) for execution of an HPC process, and each core (102, 103) being able to reactivate its clock (121, 131) when a process on the core stops to wait for an event; - a ready function (142, 152) that receives notification of events that cause execution of a process on a core, and reactivates a scheduler with deactivated clock of that core; and - an inter-core-interrupt handler (122, 132) that receives notification to cause an interrupt on a different core, and activates a scheduler with deactivated clock of that different core.