ADAPTIVE STANDARD CELL ARCHITECTURE AND LAYOUT TECHNIQUES FOR LOW AREA DIGITAL SOC

摘要

A standard cell CMOS device includes a first power rail extending across the standard cell. The first power rail is connected to one of a first voltage or a second voltage less than the first voltage. The device further includes a second power rail extending across the standard cell. The second power rail is connected to an other one of the first voltage or the second voltage. The second power rail includes a metal x layer interconnect and a set of metal x−1 layer interconnects connected to the metal x layer interconnect. The device further includes a set of CMOS transistor devices between the first and second power rails and powered by the first and second power rails. The device further includes an x−1 layer interconnect extending under and orthogonal to the second power rail. The x−1 layer interconnect is coupled to the set of CMOS transistor devices.