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MEMORY ARCHITECTURE WITH ECC AND METHOD FOR OPERATING MEMORY WITH ECC
MEMORY ARCHITECTURE WITH ECC AND METHOD FOR OPERATING MEMORY WITH ECC
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机译:具有ECC的存储器体系结构和具有ECC的存储器操作方法
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摘要
A circuit architecture for operating error-correction code (ECC) in a memory apparatus includes a control circuit and an ECC circuit. The ECC circuit is coupled with the control circuit. The control circuit receives a first data of a set of bits to invert the first data as an inverted data. The ECC circuit receives the inverted data for encryption or decryption and outputs an ECC-processed data. The control circuit inverts the ECC-processed data as a second data.
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