首页> 外国专利> SCHEDULING EXECUTION OF INSTRUCTIONS ON A PROCESSOR HAVING MULTIPLE HARDWARE THREADS WITH DIFFERENT EXECUTION RESOURCES

SCHEDULING EXECUTION OF INSTRUCTIONS ON A PROCESSOR HAVING MULTIPLE HARDWARE THREADS WITH DIFFERENT EXECUTION RESOURCES

机译:具有不同执行资源的多个硬件线程的处理器的指令执行时间

摘要

A method and apparatus are provided for executing instructions of a multi-threaded processor having multiple hardware threads with differing hardware resources comprising the steps of receiving a plurality of streams of instructions and determining which hardware threads are able to receive instructions for execution, determining whether a thread determined to be available for executing an instructions has the hardware resources available required by that instructions and executing the instruction in dependence on the result of the determination.
机译:提供了一种用于执行具有具有不同硬件资源的多个硬件线程的多线程处理器的指令的方法和装置,该方法和装置包括以下步骤:接收多个指令流;以及确定哪些硬件线程能够接收用于执行的指令;被确定为可用于执行指令的线程具有该指令所需的可用硬件资源,并根据确定结果执行该指令。

著录项

  • 公开/公告号US2017192779A1

    专利类型

  • 公开/公告日2017-07-06

    原文格式PDF

  • 申请/专利权人 IMAGINATION TECHNOLOGIES LIMITED;

    申请/专利号US201715467073

  • 发明设计人 ANDREW WEBBER;

    申请日2017-03-23

  • 分类号G06F9/30;G06F9/38;

  • 国家 US

  • 入库时间 2022-08-21 13:47:26

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号