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Non-invasive insertion of logic functions into a register-transfer level (‘RTL’) design

机译:将逻辑功能非侵入式地插入寄存器传输级(RTL)设计

摘要

A method of non-invasive insertion of logic functions into a register-transfer level (RTL) design, including: selecting a logic function to insert into a RTL design; identifying each hierarchical level executing at least a portion of the logic function; identifying a highest hierarchical level amongst hierarchical levels having each hierarchical level executing at least a portion of the logic function; and inserting all connections necessary to execute the logic function into a hardware description representation of the highest hierarchical level, without modifying a hardware description representation of any other hierarchical levels.
机译:一种无创地将逻辑功能插入寄存器传输级(RTL)设计的方法,包括:选择要插入RTL设计的逻辑功能;识别执行至少一部分逻辑功能的每个层次级别;在具有每个等级执行至少一部分逻辑功能的等级中,识别最高等级;将执行逻辑功能所需的所有连接插入到最高层次级别的硬件描述表示中,而无需修改任何其他层次级别的硬件描述表示。

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