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Systems and methods for maintaining memory access coherency in embedded memory blocks
Systems and methods for maintaining memory access coherency in embedded memory blocks
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机译:用于维持嵌入式存储器块中的存储器访问一致性的系统和方法
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摘要
Enhanced memory circuits are described that maintain coherency between concurrent memory reads and writes in a pipelined memory architecture. The described memory circuits can maintain data coherency regardless of the amount of pipelining applied to the memory inputs and/or outputs. Moreover, these memory circuits may be implemented as dedicated hard circuits in a field programmable gate array (FPGA) or other programmable logic device (PLD), and can be supplemented with user-configurable logic to achieve coherency in a variety of applications.
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