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Bit-line voltage boosting methods for static RAM and semiconductor device including static RAM

机译:用于静态RAM的位线升压方法和包括静态RAM的半导体器件

摘要

A static RAM having a plurality of word lines; a plurality of bit line pairs; a plurality of memory cells provided at intersections of the plurality of bit line pairs and the plurality of word lines; a write driver connected between a high potential power source line, of which potential is higher than a reference potential, and a drive line; a column switch having transistor pairs which connect one of the plurality of bit line pairs, which is selected, to the write driver; and a boost circuit which boosts the drive line of the write driver to a negative potential, which is a potential lower than the reference potential, at a time of writing of the memory cell, where a well of the transistor pairs of the column switch is connected to the drive line.
机译:具有多条字线的静态RAM;多个位线对;多个存储单元设置在多个位线对和多个字线的交叉处。写驱动器,连接在电位高于参考电位的高电位电源线和驱动线之间;列开关具有晶体管对,该晶体管对将所选择的多个位线对之一连接至写驱动器;升压电路,在存储单元的写入时,将写入驱动器的驱动线升压到比基准电位低的电位的负电位,其中,列开关的晶体管对的阱为连接到驱动线。

著录项

  • 公开/公告号US9589609B2

    专利类型

  • 公开/公告日2017-03-07

    原文格式PDF

  • 申请/专利权人 SOCIONEXT INC.;

    申请/专利号US201514839357

  • 发明设计人 WENHAO WU;

    申请日2015-08-28

  • 分类号G11C7/12;G11C11/419;

  • 国家 US

  • 入库时间 2022-08-21 13:41:31

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