ldpc design utilizing quasi-cyclic constructions and drilling for high rate, high parallelism, and low error floor

摘要

1/1 summary ldpc design using quasi-cyclic constructions and drilling for high rate, high parallelism, and low error floor. A data encoding method is disclosed. an encoder receives a set of information bits and performs a high ldpc encoding operation on the information bits to produce a codeword. The encoder then punctures all raised bits of the codeword corresponding to one or more perforated base bits of a base ldpc code used for the ldpc encoding operation. the base ldpc code has no multiple edges, and one or more perforated base bits are those corresponding to one or more perforated base nodes, respectively, of the base ldpc code. For some embodiments, the one or more perforated base nodes correspond to one or more grade 2 variable nodes. The LDPPC decoder treats the perforated codeword bits as deleted during operation and iterative decoding.