THE PROGRAMMABLE DIGITAL DEVICE OF THE FORMALISM OF 'RECONFIGURABLE LOGIC GRAPHS'

摘要

The illustrated patent refers to formalism for the development and execution of digital systems in the form of "Reconfigutable Logic Graphs" and to the corresponding programmable digital device. The Logic Graph is represented as a directed graph's adjacency table consisting of logical nodes analogous to the controlled inverters, which are arranged on the diagonal of the table and operated affirmatively or negatively. Besides of the diagonal carrying their states, the remaining cells of the table represent synapses between the nodes. Finally, some of those nodes are inputs and some other outputs. Thus we have a cohesive isomorphism of digital systems, suitable for configuring reconfigurable devices, such as that of the present invention, which is consisting of two layers, first that of the reprogrammable memory where the Logic Graphs are maintained by loading their adjacency tables in the memory, and second the layer of the reconfigurable matrix wherein they are executed.