SAR ADCTime interleaved pipeline SAR ADC for minimizing channel offset mismatch

摘要

The present invention relates to a pipelined SAR ADC of a time interleaving structure that reduces channel-to-channel offset mismatches, and more particularly to a pipelined SAR ADC with a time- , A second stage constituting a plurality of channels using a time interleaving SAR ADC according to a second number of bits, and a second stage which is shared between the channels and receives and amplifies a residue voltage for each channel of the first stage, And a residue voltage amplifier for outputting a signal on a channel-by-channel basis.