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HRD HEVC DESIGN OF HRD DESCRIPTOR AND BUFFER MODEL OF DATA STREAMS FOR CARRIAGE OF HEVC EXTENSIONS
HRD HEVC DESIGN OF HRD DESCRIPTOR AND BUFFER MODEL OF DATA STREAMS FOR CARRIAGE OF HEVC EXTENSIONS
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机译:HRD描述子的HRD HEVC设计和HEVC扩展的数据流缓冲模型
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摘要
The video processing device includes a plurality of elementary streams and a data stream including high efficiency video coding (HEVC) timing and virtual reference decoder (HRD) descriptors. The HEVC timing and HRD descriptors include a target schedule index syntax element that indicates the index of the delivery schedule. The video processing device may identify the syntax element in the array of syntax elements in the video parameter set (VPS) based on the set of parameters. The set of parameters may include a parameter having the same value as the value of the target schedule index syntax element. The video processing device may identify a syntax structure of the specific HRD parameters in the plurality of HRD parameters syntax structures as applicable to the particular elementary stream based on the index defined by the identified syntax element.
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