PROCESSOR INCLUDING MULTIPLE DISSIMILAR PROCESSOR CORES THAT IMPLEMENT DIFFERENT PORTIONS OF INSTRUCTION SET ARCHITECTURE

摘要

In one embodiment, the integrated circuit may include one or more processors. Each processor may include multiple processor cores, with each core having a different design / implementation and performance level. For example, a core may be implemented for high performance and another core may be implemented at a lower maximum performance, but may be optimized for efficiency. Further, in some embodiments, some features of the instruction set architecture implemented by the processor may be implemented in only one of the cores that comprise the processor. When such a feature is called by a code sequence while a different core is active, the processor may swap the cores to the core implementing the feature. Alternatively, an exception may be taken and an exception handler may be executed to identify the feature and activate the corresponding core.