4k UHD ENCODING APPRATUS USING PLURALITY OF FPGA

摘要

The present invention relates to a 4k UHD encoding apparatus using a plurality of FPGAs, and more particularly to a 4k UHD encoding apparatus using a plurality of FPGAs, which corrects errors of a video signal and an audio signal of a UHD (Ultra High Definition) video source, converts the video signal into four deserializing digital signals A 4k input processor for converting the audio signal into a deserializing digital signal; A first HEVC processor for receiving the first video signal and the audio signal of the converted video signal and converting the first video signal and the audio signal into a PCIe signal; A second, third, and fourth HEVC processors respectively receiving the second, third, and fourth video signals of the converted video signal and converting the second, third, and fourth video signals, respectively, into a PCIe signal; A PCIe switch for receiving the first, second, third, and fourth video signals converted into the PCIe signal and the audio signal; A first codec FPGA for receiving a first video signal converted from the PCIe switch into the PCIe signal, compressing and encoding the first video signal into an HEVC format, and compressing and encoding the audio signal received from the PCIe switch; And a second, third, and fourth CODEC FPGAs for respectively receiving second, third, and fourth video signals converted from the PCIe switch to the PCIe signal, and compressively encoding the second, third, and fourth video signals, respectively, in an HEVC format, The first, second, third, and fourth video signals compressed and encoded in the first, second, third, and fourth codec FPGAs and the audio signal compression-encoded in the first codec FPGA are received through a PCIe switch, And processes and packetizes the HEVC compressed image in the 4k UHD format.