POWER ARCHITECTURE WITH MULTIPLE VOLTAGE IDENTIFICATION (VID), DIGITALLY SYNTHETIZABLE LOW DROPUT CONTROLLER, AND DEVICE FOR IMPROVING THE RELIABILITY OF POWER-GATES

摘要

An apparatus comprising: a first processor core; a second processor core; and a power control unit (PCU) operable to perform the steps of: generating a first voltage identification signal (VID) for a non-local controller outside the device, the first VID in a first power supply for the first processor core results; and generating a second VID different from the first VID, wherein the second VID results in a second power supply for the second processor core; and in response to changing the first and second processor cores to a low frequency mode, reducing the first power supply, reducing a number of power-gate devices in the regulator, and repeatedly switching the power-gate devices by turning on power. Gate devices that were previously off, and vice versa.