首页>
外国专利>
Fully digital method for generating sub clock division and clock waves
Fully digital method for generating sub clock division and clock waves
展开▼
机译:生成子时钟分频和时钟波的全数字方法
展开▼
页面导航
摘要
著录项
相似文献
摘要
The present disclosure provides circuitry and a method for digital clock generation including the generation of integer and non-integer sub clocks. The proposed method provides simplified constant signal propagation and low skew in the divided clock path independent of division factor. Also provided is a simplified mechanism for generating low power clock patterns divided down by factors which are non-integer, phase-shifted, repeated pulse trains, dynamically changing and glitch-free.
展开▼