首页> 外国专利> Wideband asynchronous phase shift keying modulation demodulation circuit for ultra low power using primary sideband filter aligned at 180 degrees phase

Wideband asynchronous phase shift keying modulation demodulation circuit for ultra low power using primary sideband filter aligned at 180 degrees phase

机译:超宽带低带宽宽带异步相移键控调制解调电路,采用180度相位对准的初级边带滤波器

摘要

The BPSK demodulation circuit separates the modulated signal into a lower sideband and an upper sideband by a first order lowpass filter and a first order highpass filter whose cutoff frequency is a carrier frequency and outputs the carrier frequency 1 A sideband separation and lower sideband signal delay section for outputting an analog signal delayed by 1/4 period and an upper sideband analogue signal and a phase difference between the delayed lower sideband analog signal and the upper sideband analogue signal are Since it is aligned at 180 degrees, a signal generated by the sum of the analog signals, that is, data for demodulating the digital data by latching the analog pulse signal appearing in accordance with the phase change portion of the BPSK modulated signal by the hysteresis circuit A demodulator, a signal obtained by digitizing the delayed lower sideband analog signal by a comparator and a signal A data clock recovery section for generating a data clock by using the data signal.
机译:BPSK解调电路通过截止频率为载波频率的一阶低通滤波器和一阶高通滤波器将调制信号分离为下边带和上边带,并输出载频1 A边带分离和下边带信号延迟部分用于输出延迟了1/4周期的模拟信号和上边带模拟信号以及延迟的下边带模拟信号和上边带模拟信号之间的相位差,因为它们以180度对齐,所以由该模拟信号,即用于通过由滞后电路A解调器锁存根据BPSK调制信号的相变部分出现的模拟脉冲信号来解调数字数据的数据,该信号是通过将延迟的下边带模拟信号数字化而获得的通过比较器和信号A数据时钟恢复部分,用于通过使用数据信号生成数据时钟纳尔。

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