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Methods, systems, and articles of manufacture for graph-driven verification and debugging of an electronic design
Methods, systems, and articles of manufacture for graph-driven verification and debugging of an electronic design
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机译:用于图形驱动的电子设计验证和调试的方法,系统和制造品
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摘要
Disclosed are techniques for implementing graph-driven verification and debugging of an electronic design. These techniques identify a pair of interest that comprises a target signal and a clock cycle or an event associated with the target signal from a verification or simulation result of an electronic design or a portion thereof. A boundary for relevant driver identification (RDI) operations may be identified for normal termination of the performance of one or more RDI operations. A debug graph may then be generated and stored at least by performing one or more RDI operations for at least the pair of interest based in whole or in part upon the boundary for RDI operations.
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