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METHODS AND SYSTEMS FOR INVALIDATING MEMORY RANGES IN FABRIC-BASED ARCHITECTURES
METHODS AND SYSTEMS FOR INVALIDATING MEMORY RANGES IN FABRIC-BASED ARCHITECTURES
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机译:验证基于织物的体系结构内存范围的方法和系统
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摘要
Embodiments of the invention include a machine-readable medium having stored thereon at least one instruction, which if performed by a machine causes the machine to perform a method that includes decoding, with a node, an invalidate instruction; and executing, with the node, the invalidate instruction for invalidating a memory range specified across a fabric interconnect.
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