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MIXED STRUCTURE METHOD OF LAYOUT OF DIFFERENT SIZE ELEMENTS TO OPTIMIZE THE AREA USAGE ON A WAFER
MIXED STRUCTURE METHOD OF LAYOUT OF DIFFERENT SIZE ELEMENTS TO OPTIMIZE THE AREA USAGE ON A WAFER
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机译:晶圆上不同面积元素的布局优化的混合结构方法
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摘要
A semiconductor wafer device that comprises a round wafer with a large surface area and a low cost per unit area is disclosed. The semiconductor wafer device comprises mixed size elements, such that a plurality of large devices are manufactured on the wafer, as well as a plurality of small devices are manufactured on the wafer. The small devices act as fill in elements for the wafer, as the plurality of large devices do not efficiently fill in the wafer. Typically, the large devices comprise strap or interposer devices and the small devices comprise chip devices. The chip devices attach to small RFID antennas and the interposer devices attach to larger structures, such as high frequency tags where the strap/interposer can act as a bridge from the center of an antenna coil to the outside.
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