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MIXED STRUCTURE METHOD OF LAYOUT OF DIFFERENT SIZE ELEMENTS TO OPTIMIZE THE AREA USAGE ON A WAFER

机译:晶圆上不同面积元素的布局优化的混合结构方法

摘要

A semiconductor wafer device that comprises a round wafer with a large surface area and a low cost per unit area is disclosed. The semiconductor wafer device comprises mixed size elements, such that a plurality of large devices are manufactured on the wafer, as well as a plurality of small devices are manufactured on the wafer. The small devices act as fill in elements for the wafer, as the plurality of large devices do not efficiently fill in the wafer. Typically, the large devices comprise strap or interposer devices and the small devices comprise chip devices. The chip devices attach to small RFID antennas and the interposer devices attach to larger structures, such as high frequency tags where the strap/interposer can act as a bridge from the center of an antenna coil to the outside.
机译:公开了一种半导体晶片装置,其包括具有大表面积且单位面积成本低的圆形晶片。半导体晶片器件包括混合尺寸的元件,使得在晶片上制造多个大型器件,以及在晶片上制造多个小型器件。小型装置充当晶片的填充元件,因为多个大型装置不能有效地填充晶片。通常,大型设备包括绑带或插入设备,而小型设备包括芯片设备。芯片设备连接到小型RFID天线,插入器设备连接到较大的结构,例如高频标签,在其中带子/插入器可以充当从天线线圈中心到外部的桥梁。

著录项

  • 公开/公告号US2018158788A1

    专利类型

  • 公开/公告日2018-06-07

    原文格式PDF

  • 申请/专利权人 AVERY DENNISON RETAIL INFORMATION SERVICES LLC;

    申请/专利号US201715828733

  • 发明设计人 IAN J. FORSTER;

    申请日2017-12-01

  • 分类号H01L23/66;H04B1/40;

  • 国家 US

  • 入库时间 2022-08-21 13:00:43

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