PROCESSOR DESIGNED FOR A DETERMINISTIC SWITCHED ETHERNET NETWORK

摘要

Multiple-core processor to be connected, by way of communication ports, to a deterministic switched Ethernet network using virtual links to which items of equipment are connected, the processor including clusters each including cores, wherein at least one cluster of the processor implements a switch function that makes it possible to interconnect the items of equipment in the network. At least one cluster of the processor implements an end system function providing functions of sending and receiving data in the network, and at least one cluster of the processor implements an application.