首页> 外国专利> Dynamic tag compare circuits employing P-type field-effect transistor (PFET)-dominant evaluation circuits for reduced evaluation time, and related systems and methods

Dynamic tag compare circuits employing P-type field-effect transistor (PFET)-dominant evaluation circuits for reduced evaluation time, and related systems and methods

机译:采用P型场效应晶体管(PFET)为主的评估电路以缩短评估时间的动态标签比较电路以及相关系统和方法

摘要

Dynamic tag compare circuits employing P-type Field-Effect Transistor (PFET)-dominant evaluation circuits for reduced evaluation time, and thus increased circuit performance, are provided. A dynamic tag compare circuit may be used or provided as part of searchable memory, such as a register file or content-addressable memory (CAM), as non-limiting examples. The dynamic tag compare circuit includes one or more PFET-dominant evaluation circuits comprised of one or more PFETs used as logic to perform a compare logic function. The PFET-dominant evaluation circuits are configured to receive and compare input search data to a tag(s) (e.g., addresses or data) contained in a searchable memory to determine if the input search data is contained in the memory. The PFET-dominant evaluation circuits are configured to control the voltage/value on a dynamic node in the dynamic tag compare circuit based on the evaluation of whether the received input search data is contained in the searchable memory.
机译:提供了采用P型场效应晶体管(PFET)为主评估电路的动态标签比较电路,以缩短评估时间,从而提高电路性能。作为非限制性示例,可以将动态标签比较电路用作或提供为可搜索存储器的一部分,例如寄存器文件或内容可寻址存储器(CAM)。动态标签比较电路包括一个或多个PFET主导的评估电路,该评估电路由一个或多个PFET构成,用作逻辑以执行比较逻辑功能。以PFET为主的评估电路被配置为接收输入搜索数据并将其与可搜索存储器中包含的标签(例如地址或数据)进行比较,以确定输入搜索数据是否包含在存储器中。 PFET为主的评估电路被配置为基于对所接收的输入搜索数据是否包含在可搜索存储器中的评估来控制动态标签比较电路中的动态节点上的电压/值。

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