首页> 外国专利> AN APPARATUS AND METHOD FOR TRANSFERRING A PLURALITY OF DATA STRUCTURES BETWEEN MEMORY AND ONE OR MORE VECTORS OF DATA ELEMENTS STORED IN A REGISTER BANK

AN APPARATUS AND METHOD FOR TRANSFERRING A PLURALITY OF DATA STRUCTURES BETWEEN MEMORY AND ONE OR MORE VECTORS OF DATA ELEMENTS STORED IN A REGISTER BANK

机译:转移存储器中的数据结构和存储在存储库中的数据元素的一个或多个向量之间的多个数据结构的装置和方法

摘要

An apparatus and method are provided for transferring a plurality of data structures from memory into one or more vectors of data elements stored in a register bank. The apparatus has first interface circuitry to receive data structures retrieved from memory, where each data structure has an associated identifier and comprises N data elements. Multi-axial buffer circuitry is provided having an array of storage elements, where along a first axis the array is organised as N sets of storage elements, each set containing a plurality VL of storage elements, and where along a second axis the array is organised as groups of N storage elements, with each group containing a storage element from each of the N sets. Access control circuitry then stores the N data elements of a received data structure in one of the groups selected in dependence on the associated identifier. Responsive to an indication that all required data structures have been stored in the multi-axial buffer circuitry, second interface circuitry then outputs the data elements stored in one or more of the sets of storage elements as one or more corresponding vectors of data elements for storage in a register bank, each vector containing VL data elements. Such an approach can significantly increase the performance of handling such load operations, and give rise to potential energy savings.
机译:提供了一种用于将多个数据结构从存储器传送到存储在寄存器组中的数据元素的一个或多个向量的装置和方法。该设备具有第一接口电路,以接收从存储器检索的数据结构,其中每个数据结构具有相关联的标识符并且包括N个数据元素。提供了具有存储元件阵列的多轴缓冲电路,其中沿第一轴将阵列组织为N组存储元件,每组包含多个VL的存储元件,并且沿第二轴将阵列组织作为N个存储元素的组,每个组包含N个集合中每个集合的一个存储元素。然后,访问控制电路将接收到的数据结构的N个数据元素存储在根据关联的标识符选择的组之一中。响应于所有所需数据结构已存储在多轴缓冲器电路中的指示,第二接口电路随后将存储在一组或多组存储元素中的数据元素作为数据元素的一个或多个相应向量输出以进行存储在寄存器组中,每个向量都包含VL数据元素。这种方法可以显着提高处理此类负载操作的性能,并可以节省能源。

著录项

  • 公开/公告号US2018217840A1

    专利类型

  • 公开/公告日2018-08-02

    原文格式PDF

  • 申请/专利权人 ARM LIMITED;

    申请/专利号US201615746559

  • 发明设计人 MBOU EYOLE;MATTHIAS LOTHAR BOETTCHER;

    申请日2016-06-15

  • 分类号G06F9/30;G06F15/80;G06F3/06;

  • 国家 US

  • 入库时间 2022-08-21 12:57:05

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