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SoC fabric extensions for configurable memory maps through memory range screens and selectable address flattening

机译:SoC架构扩展可通过内存范围屏幕和可选的地址展平来配置内存映射

摘要

Described are various SoC fabric extensions for configurable memory mapping. A memory request datapath may transmit a memory request. A first circuitry may identify any memory request having an address between a base-address and limit-address. A second circuitry may transmit to a memory interface any memory request that is identified by the first circuitry, and to apply a default memory access protocol to any memory request that is unidentified by the first circuitry. A third circuitry may modify an address of a memory request when both a multiple-memory-interface indicator and an address-flattening indicator are asserted.
机译:描述了用于可配置内存映射的各种SoC结构扩展。存储器请求数据路径可以发送存储器请求。第一电路可以识别具有在基地址和限制地址之间的地址的任何存储器请求。第二电路可以将由第一电路标识的任何存储请求发送到存储器接口,并且将默认的存储器访问协议应用于第一电路未标识的任何存储请求。当同时声明多存储器接口指示符和地址平坦化指示符时,第三电路可以修改存储器请求的地址。

著录项

  • 公开/公告号US9898222B2

    专利类型

  • 公开/公告日2018-02-20

    原文格式PDF

  • 申请/专利权人 INTEL IP CORPORATION;

    申请/专利号US201514998224

  • 发明设计人 JOSE S. NIELL;

    申请日2015-12-24

  • 分类号G06F3/06;

  • 国家 US

  • 入库时间 2022-08-21 12:56:36

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